diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index bba6323..b25f5f2 100644
--- a/arch/arm/mach-imx/imx8ulp/soc.c
+++ b/arch/arm/mach-imx/imx8ulp/soc.c
@@ -23,6 +23,7 @@
 #include <dm/uclass.h>
 #include <dm/device.h>
 #include <dm/uclass-internal.h>
+#include <fuse.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -468,11 +469,22 @@
 int arch_cpu_init(void)
 {
 	if (IS_ENABLED(CONFIG_SPL_BUILD)) {
+		u32 val = 0;
+		int ret;
+		bool rdc_en = true; /* Default assume DBD_EN is set */
+
 		/* Disable wdog */
 		init_wdog();
 
+		/* Read DBD_EN fuse */
+		ret = fuse_read(8, 1, &val);
+		if (!ret)
+			rdc_en = !!(val & 0x4000);
+
 		if (get_boot_mode() == SINGLE_BOOT) {
-			release_rdc(RDC_TRDC);
+			if (rdc_en)
+				release_rdc(RDC_TRDC);
+
 			trdc_set_access();
 			/* LPAV to APD */
 			setbits_le32(0x2802B044, BIT(7));
@@ -482,8 +494,10 @@
 			setbits_le32(0x2802B04C, BIT(1) | BIT(2) | BIT(3) | BIT(4));
 		}
 
-		/* release xrdc, then allow A35 to write SRAM2 */
-		release_rdc(RDC_XRDC);
+		/* Release xrdc, then allow A35 to write SRAM2 */
+		if (rdc_en)
+			release_rdc(RDC_XRDC);
+
 		xrdc_mrc_region_set_access(2, CONFIG_SPL_TEXT_BASE, 0xE00);
 
 		clock_init();